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Learn SystemVerilog Assertions and Coverage Coding in-depth

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  • 文件大小:745MB
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文件列表

  1. 2_-_System_Verilog_Assertions_-_Basics_and_Sequences/4_-_SVA_Basics_-_Sequence_and_Property_Blocks.mp4 42MB
  2. 4_-_System_Verilog_Functional_Coverage_Coding/22_-_SV_Cross_Coverage.mp4 40MB
  3. 4_-_System_Verilog_Functional_Coverage_Coding/21_-_Coverage_bins_-_Auto_transition_wildcard_ignore_illegal.mp4 38MB
  4. 4_-_System_Verilog_Functional_Coverage_Coding/20_-_SV_Covergroups_and_Coverpoints_-_Basics.mp4 38MB
  5. 4_-_System_Verilog_Functional_Coverage_Coding/24_-_Coverage_Methods_Performance_cover_properties_and_misc.mp4 37MB
  6. 2_-_System_Verilog_Assertions_-_Basics_and_Sequences/3_-_SVA_Basics_-_Immediate_and_Concurrent_Assertions.mp4 37MB
  7. 3_-_System_Verilog_Assertions_-_Properties_and_Clocking/13_-_SVA_-_Properties_-_Basics_and_Types.mp4 33MB
  8. 3_-_System_Verilog_Assertions_-_Properties_and_Clocking/14_-_SVA_-_Recursive_Properties.mp4 33MB
  9. 3_-_System_Verilog_Assertions_-_Properties_and_Clocking/15_-_Clock_resolution_and_Multiple_Clock_sequences.mp4 33MB
  10. 2_-_System_Verilog_Assertions_-_Basics_and_Sequences/10_-_Sequences_-_Sampled_Value_Functions.mp4 32MB
  11. 5_-_Course_Wrap_up_and_Summary/27_-_Summary_and_Wrap_up.mp4 31MB
  12. 2_-_System_Verilog_Assertions_-_Basics_and_Sequences/9_-_Sequences_-_Local_Variables_and_Subroutines.mp4 31MB
  13. 4_-_System_Verilog_Functional_Coverage_Coding/19_-_Introduction_to_Coverage.mp4 30MB
  14. 2_-_System_Verilog_Assertions_-_Basics_and_Sequences/7_-_SequenceOperators_-FirstMatch_Throughout_and_Within.mp4 29MB
  15. 3_-_System_Verilog_Assertions_-_Properties_and_Clocking/16_-_SVA_-_Binding_and_expect_property.mp4 29MB
  16. 2_-_System_Verilog_Assertions_-_Basics_and_Sequences/2_-_Introduction_to_Assertions.mp4 28MB
  17. 2_-_System_Verilog_Assertions_-_Basics_and_Sequences/6_-_SequenceOperators_-_AND_OR.mp4 28MB
  18. 2_-_System_Verilog_Assertions_-_Basics_and_Sequences/5_-_SequenceOperators_-_Repeat_Operators.mp4 27MB
  19. 3_-_System_Verilog_Assertions_-_Properties_and_Clocking/18_-_Assertions_-_Lab_Exercise_2.mp4 23MB
  20. 2_-_System_Verilog_Assertions_-_Basics_and_Sequences/8_-_SequenceOperators-_if_else_ended_and_triggered.mp4 23MB
  21. 3_-_System_Verilog_Assertions_-_Properties_and_Clocking/17_-_SV_Assertions_-_Tips_and_Best_Usages.mp4 22MB
  22. 4_-_System_Verilog_Functional_Coverage_Coding/23_-_Coverage_options_and_usages.mp4 21MB
  23. 2_-_System_Verilog_Assertions_-_Basics_and_Sequences/12_-_Sequences_-_Lab_Exercise_1.mp4 19MB
  24. 2_-_System_Verilog_Assertions_-_Basics_and_Sequences/11_-_Sequences_SystemTasks_Functions.mp4 18MB
  25. 4_-_System_Verilog_Functional_Coverage_Coding/25_-_SV_Functoinal_Coverage_Lab_Exercises.mp4 14MB
  26. 1_-_Welcome_and_Overview/1_-_Introduction_and_Overview.mp4 7MB